An Introduction to Digital Logic

addition adjacent cells binary number bistable elements boolean algebra boolean expression boolean relationship boolean variables carry digit cells containing chapter clock input clock pulse column decimal decoding described design procedure dual in-line package electronic example expression for F floor full adder Gray code implemented indicates input pulse input voltage integrated circuit inverse J-K flip-flop Karnaugh map least significant digit lock logic circuits logic gates logic levels logic NAND logic systems logical O voltage master-slave method Morgan's theorem MOSFET multiplication NAND gates NAND operation negative logic noise margin octal output F output voltage partial product positive logic possible preset and preclear Q output QB and Qc R-S bistable rate multiplier represent result ripple-through counter sequential logic set or reset shown in figure shown in table shows simple simplified stage subtraction symbols synchronous counters system shown T₁ technique transistor truth table shown type D flip-flops voltage level waveform